Category GSOC
Testing the Integration of Inline Assembly and Memory Mapping
After completing the on-paper implementation of the entire program memory and IO mapping for the PicoRV32 softcore, the next crucial step was to validate the low-latency performance of the system....
Enhancing PicoRV32 Performance: Leveraging Internal Registers for I/O Operations
Integrating LSRAM and PicoRV32: Initial Challenges
Seamless Realtime Program Memory Updates in FPGA Using AXI4 and APB Interfaces
In the world of FPGA-based systems, ensuring efficient and reliable program memory updates for real-time applications is crucial. As part of a project involving the BVF RiscV Subsystem on a...
Integrating PicoRV32 with BeagleV-Fire
After 1.5 weeks of dedicated work, I successfully developed a wrapper module to integrate the PicoRV32 CPU with the CAPE module on the BeagleV-Fire. This module is critical for connecting...
Choosing PicoRV32: A Balanced Softcore CPU
With a month into the project timeline, it became imperative to finalize the processor choice—a decision I had initially deferred since the project proposal phase due to insufficient data. This...
I/O Interfacing: Register-Memory Mapping
During my recent work on memory-mapped I/O (MMIO) testing, I encountered significant challenges that led me to explore alternative solutions. One idea that emerged was to implement register-mapped I/O, albeit...
I/O Interfacing: Memory-Mapped I/O
As I dove into my coding journey with Google Summer of Code (GSoC), my mentors and I opted for weekly text-based updates on Discord for progress tracking and doubt-solving, tailored...
Starting My GSoC Journey
As the GSoC timeline began, I was still immersed in my end-term examinations, which delayed my start on the coding aspect of my project. However, I remained committed to advancing...
About my GSOC Project
As embedded systems evolve, the need for efficient real-time processing is crucial. The BeagleV-Fire’s FPGA fabric provides an ideal platform to deploy a custom RISC-V core aimed at high-performance I/O...
